[DEVICE]
FILE=M168DEF.DAT ; file name
pdf=ATmega48_88_168.pdf
pdfurl=http://www.atmel.com/dyn/resources/prod_documents/doc2545.pdf
device = ATmega168 ; command line for STK500
up = M168 ; shortname for micro
RAMSTART = $100 ; start of SRAM memory
_CHIP= 34 ; FOr backwards compatibility
RAMEND = $4FF ; Highest internal data memory (SRAM) address.
FLASHEND = $1FFF ; Highest program memory (flash) address
E2END = $1FF ; eprom end
FlashSizeText = 16 KB
SRAM = 1024 ; SRAM size
EEPROM = 512 ; EEPROM size
XRAMINDEX = 0 ; default no XRAM selected
XRAM = 0 ; do not allow XRAM
WAITSTATE=0 ; no wait state
WAITSTATEENABLE=0 ; not enable setting the wait state
XRAMACCESS=0 ; no external memory access selected
XRAMACESSENABLE=0 ; external memory access can not be selected
UBRR = 4096 ; calculation of baudrate
TINY= 0 ; no tiny micro without sram
MOVW=1 ; micro has movw instruction
HWMUL=1 ; this chip has hardware multiplication
ROMSIZE = 16384 ; size of rom in bytes
SPI_CLock=B,5 ; HW SPI clock pin
SPI_MISO=B,4 ; HW SPI MISO pin
SPI_MOSI= B,3 ; HW SPI MOSI pin
SPI_SS=B,2 ; HW SPI SS pin
INTADR = 2 ; multiple of 2 words
MEGAJMP=1 ; Mega part
MEGAPROG=1 ; program with pages method
MEGAPAGE=6 ; number of pages
PROGWAITMS=0 ; delay for programming
WRAP=0 ; address wrap
DEVID=1E9406 ; device ID
AIN0_PORT=PORTD ; analog comparator port
AIN0_PIN=6 ; analog comparator pin
T0_PULSE=PORTD.4 ; pulse generator TIMER 0
T1_PULSE=PORTD.5 ; pulse generator TIMER 1
OCR1A_PORT=PORTB.1 ; Output compare TIMER1A
INT=EIMSK, INT0 , EIFR, INT0 , EIMSK, INT1 , EIFR, INT1 , PCICR, PCIE0 , PCIFR, PCIE0, PCICR, PCIE1 , PCIFR, PCIE1,PCICR, PCIE2 , PCIFR, PCIE2,WDTCSR, WDIE,WDTCSR, WDIF ,TIMSK2, OCIE2A, TIFR2, OCIE2A,TIMSK2, OCIE2B, TIFR2, OCIE2B,TIMSK2, TOIE2, TIFR2, TOIE2,TIMSK1,ICIE1 , TIFR1, ICIE1 ,TIMSK1,OCIE1A , TIFR1, OCIE1A,TIMSK1,OCIE1B , TIFR1, OCIE1B,TIMSK1,TOIE1 , TIFR1, TOIE1,TIMSK0, OCIE0A , TIFR0 , OCIE0A,TIMSK0, OCIE0B , TIFR0 , OCIE0B,TIMSK0, TOIE0 , TIFR0 , TOIE0,SPCR, SPIE , SPSR , SPIF,UCSR0B, RXCIE0 , UCSR0A ,RXCIE0, UCSR0B, UDRIE0 , UCSR0A ,UDRIE0 ,UCSR0B, TXCIE0, UCSR0A , TXCIE0,ADCSRA , ADIE , ADCSRA , ADIF,EECR , EERIE , EECR , EERIE,ACSR , ACIE , ACSR , ACI,TWCR , TWIE , TWCR , TWINT,SPMCSR , SPMIE , SPMCSR , 5
ADFR=160 ; AD converter free running mode
ADC_REFMODEL=1 ; AD converter reference
ADC_MUX=4,ADMUX.0-3
CheckSBIC=0 ; do not check SBIC with JMP CALL
SCL=PORTC.5
SDA=PORTC.4
uarts=1 ; 1 uart in this chip
uart1=5 ; extended uart
avr910_devcode=94
ints=2 ; ext ints
int1=INT0,EIMSK.0,4 ; intname, enable register and bit, number of modes
int1m1=LOW LEVEL,EICRA.0-0,EICRA.1-0 ;first mode, bits to set and value
int1m2=CHANGE,EICRA.0-1,EICRA.1-0
int1m3=FALLING,EICRA.0-0,EICRA.1-1
int1m4=RISING,EICRA.0-1,EICRA.1-1
int2=INT1,EIMSK.1,4 ; intname, enable register and bit, number of modes
int2m1=LOW LEVEL,EICRA.2-0,EICRA.3-0 ;first mode, bits to set and value
int2m2=CHANGE,EICRA.2-1,EICRA.3-0
int2m3=FALLING,EICRA.2-0,EICRA.3-1
int2m4=RISING,EICRA.2-1,EICRA.3-1
WD=MCUSR.WDRF
NEWPORT=1
Powermodes=5
SE=SMCR.0
Pm1=Idle,SMCR.SM0-0,SMCR.SM1-0,SMCR.SM2-0
Pm2=Powerdown,SMCR.SM0-0,SMCR.SM1-1,SMCR.SM2-0
Pm3=Standby,SMCR.SM0-0,SMCR.SM1-1,SMCR.SM2-1
Pm4=ADCnoise,SMCR.SM0-1,SMCR.SM1-0,SMCR.SM2-0
Pm5=Powersave,SMCR.SM0-1,SMCR.SM1-1,SMCR.SM2-0
WDVALUE=16,32,64,128,256,512,1024,2048,4096,8192
[PROG]
chipname=MEGA168
readLB=3,58,00,FF,xx,65,43,21
writeLB=3,AC,FF,FF,xx,65,43,21
21-11=No memory lock features enabled for parallel and serial programming
21-10=Further programming of the flash and eprom is disabled in parallel and serial programming mode. The fuse bits are locked in both serial and parallel mode
21-00=Further programming and verification of the flash and eeprom is disabled in parallel and serial programming mode. The fuse bits are locked in both serial and parallel programming mode
43-11=No restrictions for SPM or LPM accessing the application section
43-10=SPM is not allowed to write to the application section
43-00=SPM is not allowed to write to the application section. Interupt vectors are placed in the boot loader section, ints are disabled while executing from the app section
43-01=LPM executing from the boot loader section is not allowed to read from the appliation section. If interrupts vectors are placed in the boot loader section interrupts are disabled while executing from the application section
65-11=No restrictions for SPM or LPM accessing the boot loader section
65-10=SPM is not allowed to write to the boot loader section
65-00=SPM is not allowed to write to the boot loader section and LPM executing from the application section is not allowed to read from the boot loader section. If int vectors are placed in the application section, ints are disabled while executing from the boot loader section
65-01=LPM executing from the application section is not allowed to read from the boot loader section. If int vectors are placed in the app section, ints are disabled while executing from the boot loader section
readFS=3,50,00,FF,C,B,KLA987
writeFS=3,AC,A0,FF,C,B,KLA987
KLA987-000000=Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0000 SUT=00]
KLA987-010000=Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms; [CKSEL=0000 SUT=01]
KLA987-100000=Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; [CKSEL=0000 SUT=10]
KLA987-000010=Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0010 SUT=00]
KLA987-010010=Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms; [CKSEL=0010 SUT=01]
KLA987-100010=Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; [CKSEL=0010 SUT=10]; default value
KLA987-000011=Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms; [CKSEL=0011 SUT=00]
KLA987-010011=Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms; [CKSEL=0011 SUT=01]
KLA987-100011=Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms; [CKSEL=0011 SUT=10]
KLA987-000100=Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms; [CKSEL=0100 SUT=00]
KLA987-010100=Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms; [CKSEL=0100 SUT=01]
KLA987-100100=Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms; [CKSEL=0100 SUT=10]
KLA987-000101=Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms; [CKSEL=0101 SUT=00]
KLA987-010101=Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms; [CKSEL=0101 SUT=01]
KLA987-100101=Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms; [CKSEL=0101 SUT=10]
KLA987-000110=Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms;[CKSEL=0110 SUT=00]
KLA987-010110=Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=0110 SUT=01]
KLA987-100110=Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=0110 SUT=10]
KLA987-110110=Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms;[CKSEL=0110 SUT=11]
KLA987-000111=Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=0111 SUT=00]
KLA987-010111=Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=0111 SUT=01]
KLA987-100111=Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms;[CKSEL=0111 SUT=10]
KLA987-110111=Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=0111 SUT=11]
KLA987-001000=Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1000 SUT=00]
KLA987-011000=Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1000 SUT=01]
KLA987-101000=Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1000 SUT=10]
KLA987-111000=Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1000 SUT=11]
KLA987-001001=Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1001 SUT=00]
KLA987-011001=Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1001 SUT=01]
KLA987-101001=Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1001 SUT=10]
KLA987-111001=Ext. Crystal Osc.; Frequency 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1001 SUT=11]
KLA987-001010=Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1010 SUT=00]
KLA987-011010=Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1010 SUT=01]
KLA987-101010=Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1010 SUT=10]
KLA987-111010=Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1010 SUT=11]
KLA987-001011=Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1011 SUT=00]
KLA987-011011=Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1011 SUT=01]
KLA987-101011=Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1011 SUT=10]
KLA987-111011=Ext. Crystal Osc.; Frequency 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1011 SUT=11]
KLA987-001100=Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1100 SUT=00]
KLA987-011100=Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1100 SUT=01]
KLA987-101100=Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1100 SUT=10]
KLA987-111100=Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1100 SUT=11]
KLA987-001101=Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1101 SUT=00]
KLA987-011101=Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1101 SUT=01]
KLA987-101101=Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1101 SUT=10]
KLA987-111101=Ext. Crystal Osc.; Frequency 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1101 SUT=11]
KLA987-001110=Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms; [CKSEL=1110 SUT=00]
KLA987-011110=Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms; [CKSEL=1110 SUT=01]
KLA987-101110=Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms; [CKSEL=1110 SUT=10]
KLA987-111110=Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms; [CKSEL=1110 SUT=11]
KLA987-001111=Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms; [CKSEL=1111 SUT=00]
KLA987-011111=Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms; [CKSEL=1111 SUT=01]
KLA987-101111=Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms; [CKSEL=1111 SUT=10]
KLA987-111111=Ext. Crystal Osc.; Frequency 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms; [CKSEL=1111 SUT=11]
KLA987-000001=reserved
KLA987-010001=reserved
KLA987-100001=reserved
KLA987-110000=reserved
KLA987-110001=reserved
KLA987-110010=reserved
KLA987-110011=reserved
KLA987-110100=reserved
KLA987-110101=reserved
B-0=CLOCK Output enabled
B-1=CLOCK Output disabled
C-0=Divide Clock by 8 Enabled
C-1=Divide Clock by 8 Disabled
readFSH=3,58,08,FF,K,J,I,H,G,DEF
writeFSH=3,AC,A8,FF,K,J,I,H,G,DEF
DEF-000=Reserved
DEF-001=Reserved
DEF-010=Reserved
DEF-011=Reserved
DEF-100=Brown Out 4.3V
DEF-101=Brown Out 2.7V
DEF-110=Brown Out 1.8V
DEF-111=Brown Out Disabled
G-0=Preserve EEPROM when chip erase
G-1=Erase EEPROM when chip erase
H-0=WDT always on
H-1=WDT enabled by WDTCR
I-0=SPI enabled
I-1=SPI disabled
J-0=debugWIRE Enabled
J-1=debugWIRE Disabled
K-0=PIN PC6 is IO pin
K-1=PIN PC6 is RESET
readcalibration=3,38,FF,00
readcalibrationCount=1
readFSE=3,50,08,00,xxxxx,RS,Q
writeFSE=3,AC,A4,00,xxxxx,RS,Q
Q-0=Select BOOT vector
Q-1=Select RESET vector (0000)
RS-00=Bootsize 1024 words
RS-01=Bootsize 512 words
RS-10=Bootsize 256 words
RS-11=Bootsize 128 words
[IOEXT]
UDR0=$C6 ; - USART0 -
UDR=$C6
UBRR0H=$C5
UBRRH=$C5
UBRRHI=$C5
UBRR0L=$C4
UBRRL=$C4
UBRR=$C4
UCSR0C=$C2
UCSRC=$C2
UCSR0B=$C1
UCR=$C1
UCSR0A=$C0
USR=$C0
TWAMR=$BD ; - TWI -
TWCR=$BC
TWDR=$BB
TWAR=$BA
TWSR=$B9
TWBR=$B8
ASSR=$B6 ; - ASYNC TIM(2) -
OCR2B=$B4 ; - TIM2 -
PWM2B=$B4 ; - TIM2 -
COMPARE2B=$B4 ; - TIM2 -
OCR2A=$B3
COMPARE2A=$B3
PWM2A=$B3
TCNT2=$B2
TIMER2=$B2
COUNTER2=$B2
TCCR2B=$B1
TCCR2=$B1
TCCR2A=$B0
OCR1BH=$8B ; - TIM1 -
OCR1BL=$8A
OCR1AH=$89
OCR1AL=$88
ICR1H=$87
ICR1L=$86
TCNT1H=$85
TCNT1L=$84
...
..
.
usw